DEC STD 123

Power Control Bus Standard

Order Number: EL-00123-00

This document, DEC STANDARD 123 Rev. B (dated March 17, 1983), defines the Digital Power Control Bus.

Purpose: It provides specifications for the bus's function, electrical, and mechanical components, enabling product designers and system installers to design and connect equipment for predictable power control (on/off) in computer systems and peripherals.

Key Components & Operation:

  • The bus utilizes a 3-wire system connecting a master switch, sensor shutoff devices (e.g., overtemperature, smoke detectors), and bus controls typically found within power controllers.
  • Pin 1 (Power Request): Controlled by the master switch. A "low" signal (switch closed) requests power to be ON.
  • Pin 2 (Power Inhibit): Controlled by sensor shutoff devices. A "low" signal (sensor closed) inhibits power. This signal overrides the power request and is not intended for normal operation.
  • Pin 3 (Return): Serves as a reference for Pins 1 and 2, and should not be grounded in new designs.
  • Power Logic: Switched power is only enabled when Pin 1 (Power Request) is LOW AND Pin 2 (Power Inhibit) is HIGH. Otherwise, power is OFF.

Critical Safety Caveats:

  • The bus is not an emergency power-off system.
  • It does not remove all hazardous voltages (e.g., certain circuits like memory refresh may remain energized).
  • It should not be relied upon as a safety interlock or to prevent fire, shock, or injury.
  • All components interfacing with the bus must meet Safety Extra Low Voltage (SELV) requirements.

Configuration & Implementation:

  • Devices connect in parallel, allowing for daisy-chaining or branching configurations.
  • Strict rules govern bus loading, limiting the number of bus controls (e.g., a maximum of 40) and overall devices due to electrical constraints (current, voltage drop).
  • The standard includes design guidelines for AC power controllers (e.g., input protection, EMI filtering), discusses optional features like power bus sequencers (to add delays for sequential power-on), and notes that power bus repeaters are generally not recommended due to potential signal locking issues.
EL-00123-00-B
March 1983
22 pages
Quality

Original
0.5MB

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